Liquid crystal display panels, extensively used in information equipment such as office automation (OA) equipment and televisions, achieve high quality images by the use of active element arrays in which more than one active element for driving the liquid crystal, such as thin film transistors (TFTs), are aligned on a substrate.
In liquid crystal display panels using active element array substrates, it is important to secure a large aperture ratio for the pixels in order to achieve a bright display and reduce power consumption. An effective way of increasing the aperture ratio is to dispose the pixel electrodes on the uppermost layer of an array substrate.
This process for manufacturing an active element array substrate is disclosed in the Japanese Laid-open Patent No. S60-112089.
FIGS. 4 and 5 are a sectional view and plan view, respectively, illustrating the conventional process for manufacturing an active element array substrate. FIG. 4 is a sectional view taken along Line 4--4 in FIG. 5.
First, a gate electrode 2 that also functions as wiring for supplying scanning voltage is formed onto a glass substrate 1, and then a gate insulation film 3 is formed over the entire face. Next, an amorphous Si (a-Si) island 4 is formed to create a TFT channel and a source-drain contact. A source electrode is connected to the source contact portion of the a-Si island 4 by source electrode wiring 5 that also functions as wiring for supplying a signal voltage to the source electrode. Drain electrode 6 connects to the drain contact of the a-Si island 4. After forming a transparent conductive layer 7 made of indium tin oxide (ITO) over the entire face, a negative photosensitive resin 8 is coated.
Next, the photosensitive resin 8 is exposed in a self-aligned manner by applying a rear irradiation light 12 from the reverse side of the substrate 1 using the gate electrode 2, source electrode wiring 5, and drain electrode 6 as a mask. The photosensitive resin 8 on the drain electrode 6 is then exposed (FIG. 4) by selective exposure of a surface irradiation light 11 from the surface of the substrate 1 using a photo mask substrate 10 with a light-blocking layer 9. The light-blocking layer 9 is patterned to have an opening at an area of the drain electrode 6. This enables the photosensitive resin on the drain electrode to be exposed, which does not occur during the exposure step from the reverse side alone.
Unexposed portions of the photosensitive resin 8 are removed by developing, thus creating a pixel electrode mask made of exposed portions of the photosensitive resin 8. In other words, those portions of the photosensitive resin 8 which are not exposed to illumination from the surface or reverse side are removed by developing. This pixel electrode mask is now used as an etching mask for etching the transparent conductive layer 7 to form a pixel electrode 7a. The pixel electrode formed in this way extends to the edge of the gate electrode 2 and source electrode wiring 5, and is connected to the drain electrode 6. Lastly, exposed portions of the photosensitive resin 8 are removed to complete an active element array substrate (FIG. 5).
As described above, the pixel electrode 7a can be increased in area by extending it to the edge of the gate electrode 2 and source electrode wiring 5. This is done by forming an exposed portion in the photosensitive resin 8 with the rear face irradiation light 12, which is self-aligned using the wiring as a mask, and the surface irradiation light 11, which selectively exposes drain electrode 6. In addition, this prevents short-circuiting of the gate electrode 2 and source electrode wiring 5. Accordingly, an active element array substrate with a large aperture ratio may be achieved by forming the pixel electrode on the uppermost layer of the substrate.
However, the above conventional method for manufacturing an active element array substrate may result in reduced yields due to scratches or dust on the rear face of the substrate.
The influence of scratches or dust on the rear face of the substrate is described next with reference to FIGS. 6 and 7.
FIGS. 6 and 7 are a sectional view and a plan view, respectively, illustrating the influence of dust on the rear face of the substrate in the conventional method for manufacturing an active element array substrate. FIG. 6 is a sectional view taken along 6--6 in FIG. 7. As shown in FIGS. 6 and 7, dust 13 adhering to the rear face of the substrate 1 during exposure of the photosensitive resin 8 using the rear face irradiation light 12 creates a portion which is not exposed either from the surface or the rear face. This generates a resist corresponding to dust 13 and thus creates a defect 7b on pixel electrode 7a. Other configurations are the same as the prior art shown in FIGS. 4 and 5, and the same numbers are given to the same components.
If there is dust 13 on the rear face of the substrate 1, the rear face irradiation light 12 exposes the photosensitive resin 8 using wiring and also the dust 13 as a mask (FIG. 6).
If the transparent conductive layer is etched using the exposed portion of the photosensitive resin 8 as a mask, pixel electrode 7a corresponding to dust 13 is also etched, generating a defect 7b (FIG. 7).
The rear face of the substrate is often scratched or collects dust or stains while it is being held during transportation. Scratches and stains may also cause defect 7b as a result of insufficient exposure to the light applied to photosensitive resin 8. Defect 7b creates a non-driven part of liquid crystal in a pixel, reducing the yield of the active element array substrate.
The present invention aims to eliminate the reduced yield caused by scratches and dust on the rear face of a substrate, and enables the manufacture of an active element array substrate with a large aperture ratio at good yields.